[Post #21/38] Active-Load Differential Pair and Cascode Differential Amplifier

CONTENT_START [HERO_HERE: An idealized schematic of a 5-T OTA and a Cascode OTA with highlighted signal paths for transconductance and output impedance.]

📘 Microelectronic Circuits Series — Post #21/38 — 10.6-10.7 (Practical)

This installment bridges the gap between basic differential pairs and high-performance operational transconductance amplifiers (OTAs). Mastering the active-load and cascode techniques is the gateway to understanding how modern high-gain integrated circuits, such as those found in mixed-signal SoCs, manage to pull significant gain out of single-stage architectures.

1. Overview & Background — Why this matters

Think of a basic resistive-load differential pair like a garden scale balanced on a pivot; if you add weight to one side, the scale tilts, but the output is restricted by the friction (the load resistors). Replacing those passive resistors with a current-mirror active load is akin to replacing a stiff mechanical spring with a frictionless electromagnetic suspension—it senses the shift in weight much more effectively and translates it into a dramatic displacement.

Figure 1. 5-T OTA (active-load differential pair) circuit

In high-performance analog design, we rarely have the luxury of infinite supply voltage to support large passive resistors. Instead, we use "active" loads—transistors biased as current sources—to provide the high incremental resistance needed for high gain. When we want even more precision, we stack transistors like a series of cascading dam gates, creating a "cascode" structure that blocks current leakage and stabilizes output flow.

These topologies are the fundamental building blocks of the "folded" or "telescopic" OTAs used in everything from the input stages of precision instrument amplifiers to the high-speed comparators inside flash ADCs. Without them, modern chip-level analog processing would be prohibitively bulky and inefficient.

[DIAGRAM_1_HERE: Schematic of the 5-T active-load differential pair.]

2. How it Works (Physical & Circuit Principles)

The 5-transistor OTA consists of a differential NMOS pair driving a PMOS current mirror. When a differential input v_id is applied, the drain currents of the input pair swing in opposite directions. The PMOS mirror, acting as a "current-to-voltage" converter, forces these currents to sum at the output node. Because the mirror essentially "mirrors" the signal current from one side to the other, the two halves of the signal combine, effectively doubling the gain relative to a single-ended output with a fixed load.

The cascode structure, by contrast, acts as an isolation barrier. By placing a transistor in series with the gain device, we effectively "shield" the drain of the input transistor from the output voltage variations. This decoupling prevents the output voltage from modulating the drain-to-source voltage of the input transistor, thereby mitigating the Channel Length Modulation (CLM) effect. The output resistance thus increases from r_o to roughly g_mr_o².

where g_m is the transconductance of the input MOSFETs, r_oN is the output resistance of the NMOS input, and r_oP is the output resistance of the PMOS active load.

💡 Intuition: The active load allows the circuit to achieve high gain without requiring huge, chip-space-consuming passive resistors, which would otherwise drop too much DC voltage.

3. Key Design Equations

The gain of the basic active-load pair is:

Figure 2. Telescopic cascode differential amplifier circuit

where g_m = 2I_D / V_OV represents the input sensitivity, and r_o = 1 / (λI_D) is the small-signal channel resistance.

The output resistance of a simple cascode is:

where g_m,casc is the transconductance of the cascode device, boosting the inherent output resistance of the input stage.

4. Worked Numerical Example

Consider a 180-nm CMOS process where I_REF = 100 μA (each side gets 50 μA). Let g_m = 1 mS and r_o = 100 kΩ for both NMOS and PMOS devices.

Step 1: Calculate the parallel combination of resistances: 100 kΩ ∥ 100 kΩ = 50 kΩ.

Step 2: Calculate the gain: A_dm = 1 mS × 50 kΩ = 50 V/V.

Step 3: If we switch to a cascode, and assume the cascode boosts r_o by a factor of 50 (based on intrinsic gain g_mr_o), the new R_out becomes 50 × 100 kΩ = 5 MΩ. The gain jumps to 1 mS × 2.5 MΩ = 2,500 V/V.

[DIAGRAM_2_HERE: Comparison table for Telescopic vs. Folded Cascode topologies.]

5. Design Considerations & Trade-offs

• Voltage Swing: Cascoding forces you to stack multiple V_DS,sat voltages, which directly eats into your output voltage headroom. In low-voltage systems (e.g., 1.2 V), this is a critical constraint.
• Power Efficiency: Adding cascode branches increases total bias current. You must balance the gain requirements against your power budget.
• Frequency Response: Higher gain via cascoding introduces additional poles at the internal nodes, potentially degrading the phase margin of your feedback system.
• Noise: Every additional transistor adds thermal noise. Cascode transistors generally contribute less noise than input transistors, but they still limit the overall noise floor.

6. Where it Shows Up in Practice

The active-load differential pair is the core of the input stage in the TI LM358 operational amplifier. Furthermore, the folded-cascode OTA is the standard workhorse for high-speed, wide-swing amplifiers in CMOS image sensors, where maintaining a wide output swing while driving capacitive loads is essential.

7. Common Pitfalls & Debugging Tips

• ⚠️ Saturation Failure: Forgetting that cascode transistors must stay in saturation. Always verify V_DS > V_OV for every device in the stack.
• ⚠️ Mirror Matching: Mismatches in the current mirror lead to DC offset at the output. Use large-area transistors to improve matching and reduce 1/f noise.

8. Exam & Interview Hot Spots

• 💡 "Why does the active load differential pair provide higher gain than a passive resistive load?" (Answer: Because the resistance provided by a current source is effectively infinite in the ideal case, while limited by r_o in reality, whereas passive resistors are constrained by the DC voltage drop).
• 💡 "Compare the telescopic vs. folded cascode." (Answer: Telescopic has higher power efficiency and lower noise, while folded allows the input common-mode range to include ground/supply rails).

9. Key Takeaways

• Active loads transform a modest passive circuit into a high-gain differential-to-single-ended converter.
• The cascode configuration significantly boosts output resistance via the (g_mr_o)² multiplier.
• Telescopic cascodes provide better speed and noise but restrict common-mode input range.
• Folded cascodes decouple the input and output nodes, enabling flexible common-mode input ranges.
• Always perform a DC operating point analysis to ensure all stacked devices remain in the active (saturation) region.

Educational content only. Always verify with datasheets and SPICE simulation before production design.